D686 Operating Systems for Computer Scientists - Set 1 - Part 1
Test your knowledge of technical writing concepts with these practice questions. Each question includes detailed explanations to help you understand the correct answers.
Question 1: When a running process encounters an instruction to read data from disk, which state transition occurs and what mechanism allows the CPU to execute another process during this waiting period?
Question 2: Your system experiences excessive page faults despite adding more memory frames, demonstrating an unusual phenomenon. What is this counterintuitive situation called and which algorithm typically exhibits this behavior?
Question 3: A multithreaded web server needs to handle thousands of client connections efficiently. Which threading model provides the best scalability while maintaining kernel-level scheduling benefits for true parallelism?
Question 4: In a microkernel architecture like Mach or Darwin, where do file system services, device drivers, and network protocols typically execute, and what is the primary advantage of this design?
Question 5: When implementing process synchronization, what specific problem occurs when multiple threads continuously check a lock variable without yielding CPU time, causing unnecessary resource consumption?
Question 6: A real-time operating system controlling aircraft navigation must guarantee response times. Which scheduling approach ensures critical tasks meet their deadlines while allowing less critical tasks to execute?
Question 7: Your database system requires multiple readers to access data simultaneously while ensuring writers have exclusive access. Which classic synchronization problem does this scenario represent and what ensures data consistency?
Question 8: During memory allocation, which strategy examines all available memory holes and selects the smallest one that fits the request, potentially leaving many small unusable fragments?
Question 9: In virtual memory systems, what mechanism speeds up address translation by caching recently used page table entries, significantly reducing memory access time for address resolution?
Question 10: When a process creates a child process using fork system call, what unique characteristic distinguishes the parent from child, allowing them to execute different code paths?
Question 11: A storage area network experiences intermittent failures. Which RAID level provides fault tolerance through mirroring while maintaining simple implementation and fast read performance?
Question 12: In process scheduling, which metric specifically measures the time from when a request is submitted until the first response is produced, critical for interactive systems?
Question 13: Your operating system needs to prevent unauthorized access while allowing legitimate users to share resources. What table structure maps domains to objects with associated access rights?
Question 14: During a context switch between processes, what specific information must the operating system save to ensure the suspended process can resume execution correctly later?
Question 15: A mobile device operating system needs to provide responsive user interfaces while conserving battery life. Which process state represents apps that aren't visible but remain in memory?
Question 16: In distributed systems, what mechanism allows multiple computers to work together appearing as a single system while sharing computational resources across network connections?
Question 17: When implementing virtual memory with demand paging, what sequence of events occurs when a program accesses a page not currently residing in physical memory?
Question 18: File systems must track available disk space efficiently. Which method uses a bit vector where each bit represents whether a disk block is free or allocated?
Question 19: In CPU scheduling, which algorithm can cause convoy effect where short processes wait behind long processes, significantly increasing average waiting time for all processes?
Question 20: Modern processors use NUMA architecture where memory access times vary. What factor determines the speed of memory access in these non-uniform memory access systems?
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